ADT7467BBZEVB【PDF 59/72 页】BOARD EVALUATION FOR ADT7467

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ADT7467

Table 53. REGISTER 0X42 ? INTERRUPT STATUS REGISTER 2 (POWER-ON DEFAULT = 0X00)

Bit

<1>

<2>

<3>

<4>

<5>

<6>

<7>

Name

OVT

FAN1

FAN2

FAN3

F4P

D1

D2

R/W

Read Only

Read Only

Read Only

Read Only

Read Only

Read/Write

Read Only

Read Only

Read Only

Description

OVT = 1 indicates that one of the THERM overtemperature limits has been exceeded. This bit is

cleared upon a read of the status register when the temperature drops below THERM ? T HYST .

FAN1 = 1 indicates that Fan 1 has dropped below minimum speed or has stalled. This bit is not set

when the PWM1 output is off.

FAN2 = 1 indicates that Fan 2 has dropped below minimum speed or has stalled. This bit is not set

when the PWM2 output is off.

FAN3 = 1 indicates that Fan 3 has dropped below minimum speed or has stalled. This bit is not set

when the PWM3 output is off.

F4P = 1 indicates that Fan 4 has dropped below minimum speed or has stalled. This bit is not set

when the PWM3 output is off.

When Pin 9 is programmed as a GPIO output, writing to this bit determines the logic output of the GPIO.

If Pin 9 is configured as the THERM timer input for THERM monitoring, then this bit is set when the

THERM assertion time exceeds the limit programmed in the THERM limit register (0x7A).

D1 = 1 indicates either an open or short circuit on the Thermal Diode 1 inputs.

D2 = 1 indicates either an open or short circuit on the Thermal Diode 2 inputs.

Table 54. VOLTAGE LIMIT REGISTERS (Note 1)

Register Address

0x46

0x47

0x48

0x49

R/W

Read/Write

Read/Write

Read/Write

Read/Write

Description (Note 2)

V CCP Low Limit

V CCP High Limit

V CC Low Limit

V CC High Limit

Power-On Default

0x00

0xFF

0x00

0xFF

1. Setting the Configuration Register 1 LOCK bit has no effect on these registers.

2. High limit: An interrupt is generated when a value exceeds its high limit (>comparison). Low limit: An interrupt is generated when a value

is equal to or below its low limit ( ? comparison).

Table 55. TEMPERATUR E LIMIT REGISTERS (Note 1)

Register Address

0x4E

0x4F

0x50

0x51

0x52

0x53

R/W

Read/Write

Read/Write

Read/Write

Read/Write

Read/Write

Read/Write

Description (Note 2)

Remote 1 Temperature Low Limit

Remote 1 Temperature High Limit

Local Temperature Low Limit

Local Temperature High Limit

Remote 2 Temperature Low Limit

Remote 2 Temperature High Limit

Power-On Default

0x01

0x7F

0x01

0x7F

0x01

0x7F

1. Exceeding any temperature limit by 1 ? C sets the appropriate status bit in the interrupt status register. Setting the Configuration Register 1

LOCK bit has no effect on these registers.

2. High limit: An interrupt is generated when a value exceeds its high limit (>comparison). Low limit: An interrupt is generated when a value

is equal to or below its low limit ( ? comparison).

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